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Sheet目录3862

162页 163页 164页 165页 [166页]167页 168页 169页 170页

PIC18F46J11 FAMILY

DS39932D-page 42

2011 Microchip Technology Inc.

3.3

Clock Sources and Oscillator

Switching

PIC18

enhanced

devices,

the

PIC18F46J11 family includes a feature that allows the

device clock source to be switched from the main

oscillator to an alternate, low-frequency clock source.

PIC18F46J11 family devices offer two alternate clock

sources. When an alternate clock source is enabled,

the various power-managed operating modes are

available.

Essentially, there are three clock sources for these

devices:

Primary Oscillators

Secondary Oscillators

Internal Oscillator Block

The Primary Oscillators include the External Crystal

and Resonator modes, the External Clock modes and

the internal oscillator block. The particular mode is

defined by the FOSC<2:0> Configuration bits. The

details of these modes are covered earlier in this

chapter.

The Secondary Oscillators are external sources that

are not connected to the OSC1 or OSC2 pins. These

sources may continue to operate even after the

controller is placed in a power-managed mode.

PIC18F46J11 family devices offer the Timer1 oscillator

as a secondary oscillator. This oscillator, in all

power-managed modes, is often the time base for

functions such as a Real-Time Clock (RTC). Most often,

a 32.768 kHz watch crystal is connected between the

RC0/T1OSO/T1CKI/RP11 and RC1/T1OSI/RP12 pins.

Like the HS Oscillator mode circuits, loading capacitors

are also connected from each pin to ground. The Timer1

oscillator is discussed in more detail in Section 13.5

“Timer1 Oscillator”

In addition to being a primary clock source, the

postscaled

internal

clock

is available as a

power-managed mode clock source. The INTRC

source is also used as the clock source for several

special features, such as the WDT and Fail-Safe Clock

Monitor (FSCM).

REGISTER 3-1:

OSCTUNE: OSCILLATOR TUNING REGISTER (ACCESS F9Bh)

R/W-0

INTSRC

PLLEN

TUN5

TUN4

TUN3

TUN2

TUN1

TUN0

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

INTSRC:

Internal Oscillator Low-Frequency Source Select bit

= 31.25 kHz device clock derived from 8 MHz INTOSC source (divide-by-256 enabled)

= 31 kHz device clock derived directly from INTRC internal oscillator

bit 6

PLLEN:

Frequency Multiplier Enable bit

= PLL enabled

= PLL disabled

bit 5-0

TUN<5:0>:

Frequency Tuning bits

011111

= Maximum frequency

011110

000001

000000

= Center frequency; oscillator module is running at the calibrated frequency

111111

100000

= Minimum frequency

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